Altium

Design Rule Verification Report

Date: 6/2/2026
Time: 11:34:04 AM
Elapsed Time: 00:00:04
Filename: D:\Works\Project_Altium\CAMBOX_RV1106\CamBox_RV1106_V5.1.PcbDoc
Warnings: 0
Rule Violations: 0

Summary

Warnings Count
Total 0

Rule Violations Count
Clearance Constraint (Gap=0.152mm) (InPolygon),(All) 0
Clearance Constraint (Gap=0.508mm) (InPoly),(InNetClass('ETH') or InNetClass('ETH_2') or InNetClass('AHD1_CSI') or InNetClass('SDCard') or InNetClass('USB') or InNetClass('ANT') or InNetClass('ANT_GPS')) 0
Clearance Constraint (Gap=0.152mm) (All),(InNetClass('All Nets')) 0
Clearance Constraint (Gap=0.2mm) (InPolygon),(InPolygon) 0
Clearance Constraint (Gap=0.152mm) (InNet('GND_EARTH')),(InNet('GND')or InNet('VBUS')) 0
Short-Circuit Constraint (Allowed=No) (All),(All) 0
Un-Routed Net Constraint ( (All) ) 0
Modified Polygon (Allow modified: No), (Allow shelved: No) 0
Width Constraint (Min=0.051mm) (Max=0.508mm) (Preferred=0.113mm) (All) 0
Width Constraint (Min=0.051mm) (Max=0.508mm) (Preferred=0.254mm) (All) 0
Power Plane Connect Rule(Relief Connect )(Expansion=0.152mm) (Conductor Width=0.254mm) (Air Gap=0.178mm) (Entries=4) (All) 0
Hole Size Constraint (Min=0.152mm) (Max=5.08mm) (All) 0
Hole To Hole Clearance (Gap=0.254mm) (All),(All) 0
Minimum Solder Mask Sliver (Gap=0.01mm) (All),(All) 0
Silk To Solder Mask (Clearance=0.01mm) (IsPad),(All) 0
Silk to Silk (Clearance=0.01mm) (All),(All) 0
Net Antennae (Tolerance=0mm) (All) 0
Matched Lengths(Tolerance=0.254mm) (InxSignalClass('xCSI')) 0
Matched Lengths(Tolerance=0.254mm) (InNetClass('ETH') or InNetClass('ETH_2')) 0
Matched Lengths(Tolerance=0.127mm) (InxSignalClass('xCSI')) 0
Matched Lengths(Tolerance=0.127mm) (InxSignalClass('SDMCC')) 0
Matched Lengths(Tolerance=0.127mm) (InNetClass('USB')) 0
Height Constraint (Min=0mm) (Max=25.4mm) (Prefered=12.7mm) (All) 0
Total 0